The present embodiments relates to management of one or more banks in DRAM. More specifically, the embodiments relate to power consumption associated with the DRAM through control of the operating state of the banks, and mitigating creation of an empty cycle on an associated data bus.
Memory is divided into two categories, referred to as volatile and non-volatile. Volatile memory is computer storage that only maintains data while an associated device receives power. At such time as power is removed, the data ceases to be maintained. An example of volatile memory, also referred to herein as volatile storage, is random access memory, e.g. RAM. Non-volatile memory is a form of computer storage that does not require continuous power to retain the data stored in an associated storage device. An example of non-volatile memory, also referred to herein as non-volatile storage, is a hard disk drive, e.g. HDD, a solid state drive, e.g. SSD, or a universal serial bus drive, e.g. USB.
Dynamic random access memory, hereinafter referred to as DRAM, is a multi-dimensional memory. The DRAM resides in modules inserted into the motherboard and is sometimes referred to as RAM. It is called dynamic because it must be continually refreshed so as not to lose the stored data. DRAM is contrasted with static RAM (SRAM), which is used for cache inside or near the central processing unit (CPU). As described herein, the DRAM is a multi-dimensional memory structure, with different operating states and each of the operating states having an associated power consumption usage.